## 基本素養 Basic Literacy

graduates should equip with both the attitude of technological/cultural literacy and the consciousness of information engineering ethics

graduates should equip with appropriate communication skill and global view

## 核心能力 Competence

graduates should equip with the basic capability of the fundamental of professional mathematics and theoretical knowledge in informatics

graduates should equip with the capability of information theory derivation、experiment design and experimental data analysis/induction

graduates should equip with the capability of learning interest development and continuous learning

graduates should equip with the capability to think creatively and independently and to explore, analyze, and solve information-related problems

graduates should equip with the information system ability in designing and verification

graduates should equip with the capability of system integration

graduates should equip with a responsible attitude in working and the capability of effective team-work collaboration

## 課程概述 Course Description

The course will introduce the theory and architecture of digital system. The outline of the course is listed as follows. ‧Chapter 1: Binary System ‧Chapter 2: Boolean Algebra and Logic Gates ‧Chapter 3: Gate-Level Minimization ‧Chapter 4: Combinational Logic ‧Chapter 5: Synchronous Sequential Logic ‧Chapter 6: Registers and Counters ‧Chapter 7: Memory and Programmable Logic ‧Chapter 8: Register Transfer Level ‧Chapter 9: Asynchronous Sequential Logic ‧Chapter 10: Digital Integrated Circuits

## 課程學習目標 Course Objectives

• 讓學生具備數位電路的基本觀念，並熟悉設計數位電路的相關技巧。
• 讓學生熟悉設計數位電路的相關技巧。
• 讓學生未來能從事數位電路設計相關職務。
• ## 課程進度 Progress Description

進度說明 Progress Description
1Chapter 1: Binary System
2Chapter 1: Binary System
3Chapter 2: Boolean Algebra and Logic Gates
4Chapter 2: Boolean Algebra and Logic Gates
5Chapter 3: Gate-Level Minimization
6Chapter 3: Gate-Level Minimization
7期中考-I
8Chapter 3: Gate-Level Minimization
9Chapter 4: Combinational Logic
10Chapter 4: Combinational Logic
11Chapter 4: Combinational Logic
12Chapter 4: Combinational Logic
13期中考-II
14Chapter 5: Synchronous Sequential Logic
15Chapter 5: Synchronous Sequential Logic
16Chapter 6: Registers and Counters
17Chapter 6: Registers and Counters
18期末考
以上每週進度教師可依上課情況做適度調整。The schedule may be subject to change.

## 課程是否與永續發展目標相關調查 Survey of the conntent relevant to SDGs

本課程與SDGs相關項目如下：
This course is relevant to these items of SDGs as following:
• 就業與經濟成長 (Decent work and Economic growth)
• 工業、創新與基礎建設 (Industry Innovation and infrastructure)

## 有關課程其他調查 Other Surveys of Courses

1.本課程是否規劃業界教師參與教學或演講? 否
Is there any industry specialist invited in this course? How many times? No
2.本課程是否規劃含校外實習(並非參訪)? 否
Are there any internships involved in the course? How many hours? No
3.本課程是否可歸認為學術倫理課程? 否
Is this course recognized as an academic ethics course? In the course how many hours are regarding academic ethics topics? No
4.本課程是否屬進入社區實踐課程? 否
Is this course recognized as a Community engagement and Service learning course? Which community will be engaged? No